In general, switched capacitor sampling filters are provided in the form of integrated circuits in a so-called "ladder" structure constituted by interconnected integrator circuits whose respective inputs are provided with capacitors that are switched by two disjoint clock states.
Minimum phase switched capacitor filters are known in which the phase/frequency response is not linear but in which the phase shift between the input and the output of the filter is at a minimum. Minimum phase filters include so-called "Chebyschev" filters having a level passband and straight amplitude/frequency attenuation. The cut-off in the amplitude/frequency response curve is steep, whereas the phase/frequency response curve increases irregularly at the transition frequency of the filter, i.e., in the vicinity of said transition frequency, the signal propagation time or the group delay increases. There are also so-called "Bessel" filters in which the cut-off in the amplitude/frequency response curve is not sharp. The group delay is constant, i.e. phase varies linearly with frequency, or in other words the phase shift between the input and the output of the filter is linear as a function of frequency. Minimum phase filters are unsatisfactory since in Chebyschev filters phase does not vary linearly with frequency and in Bessel filters the amplitude attenuation characteristic is neither sharp nor curvilinear.
In order to remedy these defects, the article "Synthesis of Switched-Capacitor Circuit Simulating Canonical Reactance Sections", by Georg J. Smolka, in IEEE Trans. Circuits and Systems, VoL. Cas-32, pages 513-521, June 1985, proposes a switched capacitor filter of the non-minimum phase type whose structure does not change amplitude/frequency attenuation but does change phase/frequency response in order to linearize it. This filter is organized in a ladder structure and is derived from a passive component LC circuit which is transformed by means of a signal flowgraph. It comprises five interconnected integrator circuits, with three of them constituting the integrating portion of the ladder circuit. It also includes two inverters, e.g. constituted by two inverting operational amplifiers, interposed between the three integrators of the ladder circuit and the other two integrator circuits which are inserted in the ladder circuit in order to linearize the phase/frequency response.
However, this type of filter is not satisfactory since it includes too high a number of active elements (operational amplifiers, inverters, switched capacitors). In addition, this filter requires six clock phases in order to operate, and this considerably complicates the clock generator. Finally, inserting this six clock phase filter in a conventional two clock phase ladder circuit constitutes a technological problem which is difficult to solve.
The object of the invention is to provide a solution to this problem. To this end, the invention provides a two-port switched capacitor filter network in which the phase/frequency response is linearized and which makes use of only two clock phases for switching the capacitors connected at the respective inputs of the integrator circuits.